* BSIM3 MODELS FOR SA110 * TO SIMULATE, PROVIDE APPROPRIATE CONTROL INPUTS AND POWER. * * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) WORST-CASE I/O DRIVER MODEL * B_IOPAD_WC * ******************************************************************************* * .SUBCKT B_IOPAD_WC 22 19 23 26 25 27 24 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 22 VDD * 19 VDDX * 23 VSSX * 26 DATA * 25 ENABLE * 27 PWRSLP * 24 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * * /| * / | * TO INTERNAL ------- |-----+ * OF CHIP \ | | * \| | * | * | * |\ | * | \ | * DATA -------| --+----- PAD * | / * |/| * | * | * | * ENABLE -----+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod AND cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * CP0 24 23 17.500f DNA2 23 24 D_NA 10.183p DNP2 23 24 D_NP 13.913u DPA4 24 19 D_PA 1.1255n DPP4 24 19 D_PP 2.5760m DPA5 18 19 D_PA 13.781p DPP5 18 19 D_PP 35.000u CP6 17 23 7.0000f DNA8 23 17 D_NA 10.183p DNP8 23 17 D_NP 13.913u DPA9 16 19 D_PA 7.6562p DPP9 16 19 D_PP 19.250u DPAA 9 19 D_PA 54.819p DPPA 9 19 D_PP 128.80u DPAB 8 19 D_PA 45.937p DPPB 8 19 D_PP 106.75u DPAC 7 19 D_PA 1.3169n DPPC 7 19 D_PP 3.0135m DPAD 5 19 D_PA 6.1250p DPPD 5 19 D_PP 15.750u DPAE 2 19 D_PA 6.1250p DPPE 2 19 D_PP 15.750u M10 24 27 23 0 MN 1.0500u 1.5750u M11 21 25 22 22 MP 350.00n 9.6250u M12 21 26 22 22 MP 350.00n 9.6250u M13 20 25 0 0 MN 350.00n 10.500u M14 21 26 20 0 MN 350.00n 10.500u M15 18 18 19 19 MP 525.00n 7.0000u M16 16 17 18 19 MP 525.00n 8.7500u M17 15 15 23 0 MN 350.00n 5.2500u M18 16 17 15 0 MN 525.00n 4.3750u Q19 23 19 17 22 PLPNP1 4 Q20 23 19 24 22 PLPNP1 60 R21 17 24 200 TC=0,0 M22 14 26 23 0 MN 350.00n 17.500u M23 14 13 23 0 MN 350.00n 17.500u M24 14 26 12 22 MP 350.00n 70.000u M25 12 13 22 22 MP 350.00n 70.000u M26 10 11 23 0 MN 437.50n 78.750u M27 9 23 24 0 MN 437.50n 8.7500u M28 9 11 19 19 MP 3.5000u 1.4000u M29 7 8 19 19 MP 437.50n 280.00u M30 24 9 7 19 MP 437.50n 1.2250m M31 13 25 22 22 MP 350.00n 21.000u M32 13 25 0 0 MN 350.00n 10.500u M33 24 11 6 0 MN 525.00n 1.3125m M34 6 14 23 0 MN 437.50n 131.25u M35 8 5 9 0 MN 350.00n 21.875u M36 8 5 19 19 MP 437.50n 52.500u M37 4 4 10 0 MN 350.00n 105.00u M38 9 9 4 0 MN 350.00n 105.00u M39 24 19 9 19 MP 437.50n 61.250u M40 5 21 0 0 MN 437.50n 14.000u M41 2 3 0 0 MN 437.50n 14.000u M42 5 27 0 0 MN 437.50n 10.325u M43 3 27 0 0 MN 437.50n 1.4000u M44 19 2 5 19 MP 437.50n 7.0000u M45 2 5 19 19 MP 437.50n 7.0000u M46 11 27 22 22 MP 350.00n 175.00u M47 11 27 0 0 MN 350.00n 87.500u M48 1 27 22 22 MP 350.00n 17.500u M49 3 21 1 22 MP 350.00n 17.500u M50 3 27 0 0 MN 350.00n 8.7500u M51 3 21 0 0 MN 350.00n 8.7500u CPF 1 0 7.0000e-16 DPAF 1 22 D_PA 7.6562p DPPF 1 22 D_PP 35.875u CP10 2 0 10.500f DNA10 0 2 D_NA 12.250p DNP10 0 2 D_NP 29.750u CP11 3 0 17.500f DNA11 0 3 D_NA 16.537p DNP11 0 3 D_NP 43.050u DPA11 3 22 D_PA 15.312p DPP11 3 22 D_PP 36.750u CP12 4 0 10.500f DNA12 0 4 D_NA 183.75p DNP12 0 4 D_NP 423.50u CP13 5 0 21.000f DNA13 0 5 D_NA 21.284p DNP13 0 5 D_NP 52.150u CP14 6 0 7.0000f DNA14 0 6 D_NA 1.2633n DNP14 0 6 D_NP 2.8910m CP16 8 0 10.500f DNA16 0 8 D_NA 19.141p DNP16 0 8 D_NP 45.500u CP17 9 0 24.500f DNA17 0 9 D_NA 118.67p DNP17 0 9 D_NP 276.50u CP18 10 0 7.0000f DNA18 0 10 D_NA 160.78p DNP18 0 10 D_NP 371.00u CP19 11 0 17.500f DNA19 0 11 D_NA 76.562p DNP19 0 11 D_NP 176.75u DPA19 11 22 D_PA 153.12p DPP19 11 22 D_PP 351.75u CP1A 12 0 7.0000e-16 DPA1A 12 22 D_PA 30.625p DPP1A 12 22 D_PP 140.87u CP1B 13 0 14.000f DNA1B 0 13 D_NA 9.1875p DNP1B 0 13 D_NP 22.750u DPA1B 13 22 D_PA 18.375p DPP1B 13 22 D_PP 43.750u CP1C 14 0 14.000f DNA1C 0 14 D_NA 30.625p DNP1C 0 14 D_NP 73.500u DPA1C 14 22 D_PA 61.250p DPP1C 14 22 D_PP 141.75u CP1D 15 0 10.500f DNA1D 0 15 D_NA 8.4219p DNP1D 0 15 D_NP 22.750u CP1E 16 0 7.0000f DNA1E 0 16 D_NA 3.8281p DNP1E 0 16 D_NP 10.500u CP1F 17 0 7.0000f CP21 19 0 3.5000f CP22 20 0 7.0000e-16 DNA22 0 20 D_NA 4.5937p DNP22 0 20 D_NP 21.875u CP24 21 0 21.000f DNA24 0 21 D_NA 9.1875p DNP24 0 21 D_NP 22.750u DPA24 21 22 D_PA 16.844p DPP24 21 22 D_PP 42.000u CP25 22 0 21.000f CP26 23 0 24.500f DNA26 0 23 D_NA 220.35p DNP26 0 23 D_NP 514.15u CP27 24 0 17.500f DNA27 0 24 D_NA 1.1575n DNP27 0 24 D_NP 2.6509m CP28 25 0 14.000f CP29 26 0 14.000f CP2A 27 0 24.500f * .ENDS B_IOPAD_WC ******************************************************************************* ******************************************************************************* * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) BEST-CASE I/O DRIVER MODEL * B_IOPAD_BC * ******************************************************************************* * .SUBCKT B_IOPAD_BC 22 19 23 26 25 27 24 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 22 VDD * 19 VDDX * 23 VSSX * 26 DATA * 25 ENABLE * 27 PWRSLP * 24 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * * /| * / | * TO INTERNAL ------- |-----+ * OF CHIP \ | | * \| | * | * | * |\ | * | \ | * DATA -------| --+----- PAD * | / * |/| * | * | * | * ENABLE -----+ * * * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod AND cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * CP0 24 23 17.500f DNA2 23 24 D_NA 10.183p DNP2 23 24 D_NP 13.913u DPA4 24 19 D_PA 1.1255n DPP4 24 19 D_PP 2.5760m DPA5 18 19 D_PA 13.781p DPP5 18 19 D_PP 35.000u CP6 17 23 7.0000f DNA8 23 17 D_NA 10.183p DNP8 23 17 D_NP 13.913u DPA9 16 19 D_PA 7.6562p DPP9 16 19 D_PP 19.250u DPAA 9 19 D_PA 54.819p DPPA 9 19 D_PP 128.80u DPAB 8 19 D_PA 45.937p DPPB 8 19 D_PP 106.75u DPAC 7 19 D_PA 1.3169n DPPC 7 19 D_PP 3.0135m DPAD 5 19 D_PA 6.1250p DPPD 5 19 D_PP 15.750u DPAE 2 19 D_PA 6.1250p DPPE 2 19 D_PP 15.750u M10 24 27 23 0 MN 1.0500u 1.5750u M11 21 25 22 22 MP 350.00n 9.6250u M12 21 26 22 22 MP 350.00n 9.6250u M13 20 25 0 0 MN 350.00n 10.500u M14 21 26 20 0 MN 350.00n 10.500u M15 18 18 19 19 MP 525.00n 7.0000u M16 16 17 18 19 MP 525.00n 8.7500u M17 15 15 23 0 MN 350.00n 5.2500u M18 16 17 15 0 MN 525.00n 4.3750u Q19 23 19 17 22 PLPNP1 4 Q20 23 19 24 22 PLPNP1 60 R21 17 24 200 TC=0,0 M22 14 26 23 0 MN 350.00n 17.500u M23 14 13 23 0 MN 350.00n 17.500u M24 14 26 12 22 MP 350.00n 70.000u M25 12 13 22 22 MP 350.00n 70.000u M26 10 11 23 0 MN 437.50n 78.750u M27 9 23 24 0 MN 437.50n 8.7500u M28 9 11 19 19 MP 3.5000u 1.4000u M29 7 8 19 19 MP 437.50n 280.00u M30 24 9 7 19 MP 437.50n 1.2250m M31 13 25 22 22 MP 350.00n 21.000u M32 13 25 0 0 MN 350.00n 10.500u M33 24 11 6 0 MN 525.00n 1.3125m M34 6 14 23 0 MN 437.50n 131.25u M35 8 5 9 0 MN 350.00n 21.875u M36 8 5 19 19 MP 437.50n 52.500u M37 4 4 10 0 MN 350.00n 105.00u M38 9 9 4 0 MN 350.00n 105.00u M39 24 19 9 19 MP 437.50n 61.250u M40 5 21 0 0 MN 437.50n 14.000u M41 2 3 0 0 MN 437.50n 14.000u M42 5 27 0 0 MN 437.50n 10.325u M43 3 27 0 0 MN 437.50n 1.4000u M44 19 2 5 19 MP 437.50n 7.0000u M45 2 5 19 19 MP 437.50n 7.0000u M46 11 27 22 22 MP 350.00n 175.00u M47 11 27 0 0 MN 350.00n 87.500u M48 1 27 22 22 MP 350.00n 17.500u M49 3 21 1 22 MP 350.00n 17.500u M50 3 27 0 0 MN 350.00n 8.7500u M51 3 21 0 0 MN 350.00n 8.7500u CPF 1 0 7.0000e-16 DPAF 1 22 D_PA 7.6562p DPPF 1 22 D_PP 35.875u CP10 2 0 10.500f DNA10 0 2 D_NA 12.250p DNP10 0 2 D_NP 29.750u CP11 3 0 17.500f DNA11 0 3 D_NA 16.537p DNP11 0 3 D_NP 43.050u DPA11 3 22 D_PA 15.312p DPP11 3 22 D_PP 36.750u CP12 4 0 10.500f DNA12 0 4 D_NA 183.75p DNP12 0 4 D_NP 423.50u CP13 5 0 21.000f DNA13 0 5 D_NA 21.284p DNP13 0 5 D_NP 52.150u CP14 6 0 7.0000f DNA14 0 6 D_NA 1.2633n DNP14 0 6 D_NP 2.8910m CP16 8 0 10.500f DNA16 0 8 D_NA 19.141p DNP16 0 8 D_NP 45.500u CP17 9 0 24.500f DNA17 0 9 D_NA 118.67p DNP17 0 9 D_NP 276.50u CP18 10 0 7.0000f DNA18 0 10 D_NA 160.78p DNP18 0 10 D_NP 371.00u CP19 11 0 17.500f DNA19 0 11 D_NA 76.562p DNP19 0 11 D_NP 176.75u DPA19 11 22 D_PA 153.12p DPP19 11 22 D_PP 351.75u CP1A 12 0 7.0000e-16 DPA1A 12 22 D_PA 30.625p DPP1A 12 22 D_PP 140.87u CP1B 13 0 14.000f DNA1B 0 13 D_NA 9.1875p DNP1B 0 13 D_NP 22.750u DPA1B 13 22 D_PA 18.375p DPP1B 13 22 D_PP 43.750u CP1C 14 0 14.000f DNA1C 0 14 D_NA 30.625p DNP1C 0 14 D_NP 73.500u DPA1C 14 22 D_PA 61.250p DPP1C 14 22 D_PP 141.75u CP1D 15 0 10.500f DNA1D 0 15 D_NA 8.4219p DNP1D 0 15 D_NP 22.750u CP1E 16 0 7.0000f DNA1E 0 16 D_NA 3.8281p DNP1E 0 16 D_NP 10.500u CP1F 17 0 7.0000f CP21 19 0 3.5000f CP22 20 0 7.0000e-16 DNA22 0 20 D_NA 4.5937p DNP22 0 20 D_NP 21.875u CP24 21 0 21.000f DNA24 0 21 D_NA 9.1875p DNP24 0 21 D_NP 22.750u DPA24 21 22 D_PA 16.844p DPP24 21 22 D_PP 42.000u CP25 22 0 21.000f CP26 23 0 24.500f DNA26 0 23 D_NA 220.35p DNP26 0 23 D_NP 514.15u CP27 24 0 17.500f DNA27 0 24 D_NA 1.1575n DNP27 0 24 D_NP 2.6509m CP28 25 0 14.000f CP29 26 0 14.000f CP2A 27 0 24.500f * .ENDS B_IOPAD_BC * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) WORST-CASE INPUT RECEIVER MODEL * B_IPAD_WC * ******************************************************************************* * .SUBCKT B_IPAD_WC 5 9 3 8 * * SUBCKT CALL IS: VDD VDDX VSSX PAD * * NODE NAME * --------------- * 5 VDD * 9 VDDX * 3 VSSX * 8 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'PAD' IS THE EXTERNAL INPUT TO THE RECEIVER * * * * * |\ * | \ * PAD -------| -------- TO INTERNAL CORE OF CHIP * | / * |/ * * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod AND cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DNA1 3 8 D_NA 10.183p DNP1 3 8 D_NP 13.913u DPA2 7 9 D_PA 7.6562p DPP2 7 9 D_PP 19.250u CP3 4 3 7.0000f DNA5 3 4 D_NA 10.183p DNP5 3 4 D_NP 13.913u DPA6 1 9 D_PA 13.781p DPP6 1 9 D_PP 35.000u M7 6 7 0 0 MN 525.00n 5.2500u M8 6 7 5 5 MP 350.00n 8.7500u R9 4 8 200 TC=0,0 Q10 3 9 8 5 PLPNP1 60 Q11 3 9 4 5 PLPNP1 4 M12 2 2 0 0 MN 350.00n 5.2500u M13 7 4 2 0 MN 525.00n 4.3750u M14 1 1 9 9 MP 525.00n 7.0000u M15 7 4 1 9 MP 525.00n 8.7500u CP8 2 0 10.500f DNA8 0 2 D_NA 8.4219p DNP8 0 2 D_NP 22.750u CPA 4 0 7.0000f CPB 5 0 3.5000f CPC 6 0 7.0000f DNAC 0 6 D_NA 4.5937p DNPC 0 6 D_NP 12.250u DPAC 6 5 D_PA 7.6562p DPPC 6 5 D_PP 19.250u CPD 7 0 14.000f DNAD 0 7 D_NA 3.8281p DNPD 0 7 D_NP 10.500u * .ENDS B_IPAD_WC ******************************************************************************* ******************************************************************************* * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) BEST-CASE INPUT RECEIVER MODEL * B_IPAD_BC * ******************************************************************************* * .SUBCKT B_IPAD_BC 5 9 3 8 * * SUBCKT CALL IS: VDD VDDX VSSX PAD * * NODE NAME * --------------- * 5 VDD * 9 VDDX * 3 VSSX * 8 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'PAD' IS THE EXTERNAL INPUT TO THE RECEIVER * * * * * |\ * | \ * PAD -------| -------- TO INTERNAL CORE OF CHIP * | / * |/ * * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod AND cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DNA1 3 8 D_NA 10.183p DNP1 3 8 D_NP 13.913u DPA2 7 9 D_PA 7.6562p DPP2 7 9 D_PP 19.250u CP3 4 3 7.0000f DNA5 3 4 D_NA 10.183p DNP5 3 4 D_NP 13.913u DPA6 1 9 D_PA 13.781p DPP6 1 9 D_PP 35.000u M7 6 7 0 0 MN 525.00n 5.2500u M8 6 7 5 5 MP 350.00n 8.7500u R9 4 8 200 TC=0,0 Q10 3 9 8 5 PLPNP1 60 Q11 3 9 4 5 PLPNP1 4 M12 2 2 0 0 MN 350.00n 5.2500u M13 7 4 2 0 MN 525.00n 4.3750u M14 1 1 9 9 MP 525.00n 7.0000u M15 7 4 1 9 MP 525.00n 8.7500u CP8 2 0 10.500f DNA8 0 2 D_NA 8.4219p DNP8 0 2 D_NP 22.750u CPA 4 0 7.0000f CPB 5 0 3.5000f CPC 6 0 7.0000f DNAC 0 6 D_NA 4.5937p DNPC 0 6 D_NP 12.250u DPAC 6 5 D_PA 7.6562p DPPC 6 5 D_PP 19.250u CPD 7 0 14.000f DNAD 0 7 D_NA 3.8281p DNPD 0 7 D_NP 10.500u * .ENDS B_IPAD_BC * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) WORST-CASE OUTPUT DRIVER MODEL * B_OPAD_WC * ******************************************************************************* * .SUBCKT B_OPAD_WC 19 12 14 22 21 23 20 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 19 VDD * 12 VDDX * 14 VSSX * 22 DATA * 21 ENABLE * 23 PWRSLP * 20 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (AT VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * |\ * | \ * DATA -------| -------- PAD * | / * |/| * | * | * | * ENABLE -----+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DPA0 20 12 D_PA 1.1255n DPP0 20 12 D_PP 2.5760m DPA1 7 12 D_PA 54.819p DPP1 7 12 D_PP 128.80u DPA2 6 12 D_PA 45.937p DPP2 6 12 D_PP 106.75u DPA3 5 12 D_PA 1.3169n DPP3 5 12 D_PP 3.0135m DPA4 3 12 D_PA 6.1250p DPP4 3 12 D_PP 15.750u DPA5 1 12 D_PA 6.1250p DPP5 1 12 D_PP 15.750u M8 18 23 19 19 MP 350.00n 17.500u M9 16 17 18 19 MP 350.00n 17.500u M10 16 23 0 0 MN 350.00n 8.7500u M11 16 17 0 0 MN 350.00n 8.7500u M12 15 23 19 19 MP 350.00n 175.00u M13 15 23 0 0 MN 350.00n 87.500u M14 20 23 14 0 MN 1.0500u 1.5750u M15 17 21 19 19 MP 350.00n 8.7500u M16 17 22 19 19 MP 350.00n 8.7500u M17 13 21 0 0 MN 350.00n 4.3750u M18 17 22 13 0 MN 350.00n 4.3750u Q19 14 12 20 19 PLPNP1 60 M20 11 22 14 0 MN 350.00n 17.500u M21 11 10 14 0 MN 350.00n 17.500u M22 11 22 9 19 MP 350.00n 70.000u M23 9 10 19 19 MP 350.00n 70.000u M24 8 15 14 0 MN 437.50n 78.750u M25 7 14 20 0 MN 437.50n 8.7500u M26 7 15 12 12 MP 3.5000u 1.4000u M27 5 6 12 12 MP 437.50n 280.00u M28 20 7 5 12 MP 437.50n 1.2250m M29 10 21 19 19 MP 350.00n 21.000u M30 10 21 0 0 MN 350.00n 10.500u M31 20 15 4 0 MN 525.00n 1.3125m M32 4 11 14 0 MN 437.50n 131.25u M33 6 3 7 0 MN 350.00n 21.875u M34 6 3 12 12 MP 437.50n 52.500u M35 2 2 8 0 MN 350.00n 105.00u M36 7 7 2 0 MN 350.00n 105.00u M37 20 12 7 12 MP 437.50n 61.250u M38 3 17 0 0 MN 437.50n 14.000u M39 1 16 0 0 MN 437.50n 14.000u M40 3 23 0 0 MN 437.50n 10.325u M41 16 23 0 0 MN 437.50n 1.4000u M42 12 1 3 12 MP 437.50n 7.0000u M43 1 3 12 12 MP 437.50n 7.0000u CP6 1 0 10.500f DNA6 0 1 D_NA 12.250p DNP6 0 1 D_NP 29.750u CP7 2 0 10.500f DNA7 0 2 D_NA 183.75p DNP7 0 2 D_NP 423.50u CP8 3 0 21.000f DNA8 0 3 D_NA 21.284p DNP8 0 3 D_NP 52.150u CP9 4 0 7.0000f DNA9 0 4 D_NA 1.2633n DNP9 0 4 D_NP 2.8910m CPB 6 0 10.500f DNAB 0 6 D_NA 19.141p DNPB 0 6 D_NP 45.500u CPC 7 0 24.500f DNAC 0 7 D_NA 118.67p DNPC 0 7 D_NP 276.50u CPD 8 0 7.0000f DNAD 0 8 D_NA 160.78p DNPD 0 8 D_NP 371.00u CPE 9 0 7.0000e-16 DPAE 9 19 D_PA 30.625p DPPE 9 19 D_PP 140.87u CPF 10 0 14.000f DNAF 0 10 D_NA 9.1875p DNPF 0 10 D_NP 22.750u DPAF 10 19 D_PA 18.375p DPPF 10 19 D_PP 43.750u CP10 11 0 14.000f DNA10 0 11 D_NA 30.625p DNP10 0 11 D_NP 73.500u DPA10 11 19 D_PA 61.250p DPP10 11 19 D_PP 141.75u CP11 12 0 3.5000f CP12 13 0 7.0000e-16 DNA12 0 13 D_NA 1.9141p DNP12 0 13 D_NP 9.6250u CP13 14 0 21.000f DNA13 0 14 D_NA 215.75p DNP13 0 14 D_NP 501.90u CP14 15 0 17.500f DNA14 0 15 D_NA 76.562p DNP14 0 15 D_NP 176.75u DPA14 15 19 D_PA 153.12p DPP14 15 19 D_PP 351.75u CP16 16 0 17.500f DNA16 0 16 D_NA 16.537p DNP16 0 16 D_NP 43.050u DPA16 16 19 D_PA 15.312p DPP16 16 19 D_PP 36.750u CP17 17 0 21.000f DNA17 0 17 D_NA 3.8281p DNP17 0 17 D_NP 10.500u DPA17 17 19 D_PA 15.312p DPP17 17 19 D_PP 38.500u CP18 18 0 7.0000e-16 DPA18 18 19 D_PA 7.6562p DPP18 18 19 D_PP 35.875u CP19 19 0 21.000f CP1A 20 0 17.500f DNA1A 0 20 D_NA 1.1575n DNP1A 0 20 D_NP 2.6509m CP1B 21 0 14.000f CP1C 22 0 14.000f CP1D 23 0 24.500f * .ENDS B_OPAD_WC ******************************************************************************* ******************************************************************************* * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) BEST-CASE OUTPUT DRIVER MODEL * B_OPAD_BC * ******************************************************************************* * .SUBCKT B_OPAD_BC 19 12 14 22 21 23 20 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 19 VDD * 12 VDDX * 14 VSSX * 22 DATA * 21 ENABLE * 23 PWRSLP * 20 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (AT VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * |\ * | \ * DATA -------| -------- PAD * | / * |/| * | * | * | * ENABLE -----+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DPA0 20 12 D_PA 1.1255n DPP0 20 12 D_PP 2.5760m DPA1 7 12 D_PA 54.819p DPP1 7 12 D_PP 128.80u DPA2 6 12 D_PA 45.937p DPP2 6 12 D_PP 106.75u DPA3 5 12 D_PA 1.3169n DPP3 5 12 D_PP 3.0135m DPA4 3 12 D_PA 6.1250p DPP4 3 12 D_PP 15.750u DPA5 1 12 D_PA 6.1250p DPP5 1 12 D_PP 15.750u M8 18 23 19 19 MP 350.00n 17.500u M9 16 17 18 19 MP 350.00n 17.500u M10 16 23 0 0 MN 350.00n 8.7500u M11 16 17 0 0 MN 350.00n 8.7500u M12 15 23 19 19 MP 350.00n 175.00u M13 15 23 0 0 MN 350.00n 87.500u M14 20 23 14 0 MN 1.0500u 1.5750u M15 17 21 19 19 MP 350.00n 8.7500u M16 17 22 19 19 MP 350.00n 8.7500u M17 13 21 0 0 MN 350.00n 4.3750u M18 17 22 13 0 MN 350.00n 4.3750u Q19 14 12 20 19 PLPNP1 60 M20 11 22 14 0 MN 350.00n 17.500u M21 11 10 14 0 MN 350.00n 17.500u M22 11 22 9 19 MP 350.00n 70.000u M23 9 10 19 19 MP 350.00n 70.000u M24 8 15 14 0 MN 437.50n 78.750u M25 7 14 20 0 MN 437.50n 8.7500u M26 7 15 12 12 MP 3.5000u 1.4000u M27 5 6 12 12 MP 437.50n 280.00u M28 20 7 5 12 MP 437.50n 1.2250m M29 10 21 19 19 MP 350.00n 21.000u M30 10 21 0 0 MN 350.00n 10.500u M31 20 15 4 0 MN 525.00n 1.3125m M32 4 11 14 0 MN 437.50n 131.25u M33 6 3 7 0 MN 350.00n 21.875u M34 6 3 12 12 MP 437.50n 52.500u M35 2 2 8 0 MN 350.00n 105.00u M36 7 7 2 0 MN 350.00n 105.00u M37 20 12 7 12 MP 437.50n 61.250u M38 3 17 0 0 MN 437.50n 14.000u M39 1 16 0 0 MN 437.50n 14.000u M40 3 23 0 0 MN 437.50n 10.325u M41 16 23 0 0 MN 437.50n 1.4000u M42 12 1 3 12 MP 437.50n 7.0000u M43 1 3 12 12 MP 437.50n 7.0000u CP6 1 0 10.500f DNA6 0 1 D_NA 12.250p DNP6 0 1 D_NP 29.750u CP7 2 0 10.500f DNA7 0 2 D_NA 183.75p DNP7 0 2 D_NP 423.50u CP8 3 0 21.000f DNA8 0 3 D_NA 21.284p DNP8 0 3 D_NP 52.150u CP9 4 0 7.0000f DNA9 0 4 D_NA 1.2633n DNP9 0 4 D_NP 2.8910m CPB 6 0 10.500f DNAB 0 6 D_NA 19.141p DNPB 0 6 D_NP 45.500u CPC 7 0 24.500f DNAC 0 7 D_NA 118.67p DNPC 0 7 D_NP 276.50u CPD 8 0 7.0000f DNAD 0 8 D_NA 160.78p DNPD 0 8 D_NP 371.00u CPE 9 0 7.0000e-16 DPAE 9 19 D_PA 30.625p DPPE 9 19 D_PP 140.87u CPF 10 0 14.000f DNAF 0 10 D_NA 9.1875p DNPF 0 10 D_NP 22.750u DPAF 10 19 D_PA 18.375p DPPF 10 19 D_PP 43.750u CP10 11 0 14.000f DNA10 0 11 D_NA 30.625p DNP10 0 11 D_NP 73.500u DPA10 11 19 D_PA 61.250p DPP10 11 19 D_PP 141.75u CP11 12 0 3.5000f CP12 13 0 7.0000e-16 DNA12 0 13 D_NA 1.9141p DNP12 0 13 D_NP 9.6250u CP13 14 0 21.000f DNA13 0 14 D_NA 215.75p DNP13 0 14 D_NP 501.90u CP14 15 0 17.500f DNA14 0 15 D_NA 76.562p DNP14 0 15 D_NP 176.75u DPA14 15 19 D_PA 153.12p DPP14 15 19 D_PP 351.75u CP16 16 0 17.500f DNA16 0 16 D_NA 16.537p DNP16 0 16 D_NP 43.050u DPA16 16 19 D_PA 15.312p DPP16 16 19 D_PP 36.750u CP17 17 0 21.000f DNA17 0 17 D_NA 3.8281p DNP17 0 17 D_NP 10.500u DPA17 17 19 D_PA 15.312p DPP17 17 19 D_PP 38.500u CP18 18 0 7.0000e-16 DPA18 18 19 D_PA 7.6562p DPP18 18 19 D_PP 35.875u CP19 19 0 21.000f CP1A 20 0 17.500f DNA1A 0 20 D_NA 1.1575n DNP1A 0 20 D_NP 2.6509m CP1B 21 0 14.000f CP1C 22 0 14.000f CP1D 23 0 24.500f * .ENDS B_OPAD_BC * * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) WORST-CASE NC PAD MODEL * B_NCPAD_WC * ******************************************************************************* * .SUBCKT B_NCPAD_WC 1 4 2 5 * * SUBCKT CALL IS: VDD VDDX VSSX PAD * * NODE NAME * --------------- * 1 VDD * 4 VDDX * 2 VSSX * 5 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'PAD' IS THE NC PAD * * * * * * * PAD -------------> TO INTERNAL OF CHIP * * * * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* DNA1 2 5 D_NA 10.183p DNP1 2 5 D_NP 13.913u DNA3 2 3 D_NA 10.183p DNP3 2 3 D_NP 13.913u Q5 2 4 3 1 PLPNP1 4 Q6 2 4 5 1 PLPNP1 60 R7 5 3 200 TC=0,0 * .ENDS B_NCPAD_WC ******************************************************************************* ******************************************************************************* * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) BEST-CASE NC PAD MODEL * B_NCPAD_BC * ******************************************************************************* * .SUBCKT B_NCPAD_BC 1 4 2 5 * * SUBCKT CALL IS: VDD VDDX VSSX PAD * * NODE NAME * --------------- * 1 VDD * 4 VDDX * 2 VSSX * 5 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'PAD' IS THE NC PAD * * * * * * * PAD -------------> TO INTERNAL OF CHIP * * * * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* DNA1 2 5 D_NA 10.183p DNP1 2 5 D_NP 13.913u DNA3 2 3 D_NA 10.183p DNP3 2 3 D_NP 13.913u Q5 2 4 3 1 PLPNP1 4 Q6 2 4 5 1 PLPNP1 60 R7 5 3 200 TC=0,0 * .ENDS B_NCPAD_BC * * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) WORST-CASE OUTPUT DRIVER MODEL * B_OPAD_MREQ_WC * ******************************************************************************* * .SUBCKT B_OPAD_MREQ_WC 6 16 10 22 23 21 24 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 6 VDD * 16 VDDX * 10 VSSX * 22 DATA * 23 ENABLE * 21 PWRSLP * 24 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (AT VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * |\ * | \ * DATA -------| -------- PAD * | / * |/| * | * | * | * ENABLE -----+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DPA0 24 16 D_PA 1.1282n DPP0 24 16 D_PP 2.5840m DPA1 19 16 D_PA 6.1250p DPP1 19 16 D_PP 15.750u DPA2 17 16 D_PA 6.1250p DPP2 17 16 D_PP 15.750u CP3 15 10 10.500f DNA5 10 15 D_NA 765.62f DNP5 10 15 D_NP 3.5000u DPA6 15 16 D_PA 1.5312p DPP6 15 16 D_PP 5.2500u DPA7 14 16 D_PA 54.819p DPP7 14 16 D_PP 128.80u DPA8 11 16 D_PA 45.937p DPP8 11 16 D_PP 106.75u DPA9 4 16 D_PA 1.3169n DPP9 4 16 D_PP 3.0135m M9 19 20 0 0 MN 437.50n 14.000u M10 17 18 0 0 MN 437.50n 14.000u M11 24 15 16 16 MP 1.0500u 3.1500u M12 24 16 14 16 MP 437.50n 61.250u M13 14 14 13 0 MN 350.00n 105.00u M14 13 13 12 0 MN 350.00n 105.00u M15 11 17 16 16 MP 437.50n 52.500u M16 11 17 14 0 MN 350.00n 21.875u M17 8 9 10 0 MN 437.50n 131.25u M18 24 7 8 0 MN 525.00n 1.3125m M19 5 23 6 6 MP 350.00n 21.000u M20 5 23 0 0 MN 350.00n 10.500u M21 24 14 4 16 MP 437.50n 1.2250m M22 4 11 16 16 MP 437.50n 280.00u M23 14 7 16 16 MP 3.5000u 1.4000u M24 14 10 24 0 MN 437.50n 8.7500u M25 12 7 10 0 MN 437.50n 78.750u M26 3 5 6 6 MP 350.00n 70.000u M27 9 22 3 6 MP 350.00n 70.000u M28 9 5 10 0 MN 350.00n 17.500u M29 9 22 10 0 MN 350.00n 17.500u Q30 10 16 24 6 PLPNP1 60 M31 18 22 6 6 MP 350.00n 9.6250u M32 18 23 6 6 MP 350.00n 9.6250u M33 2 22 0 0 MN 350.00n 10.500u M34 18 23 2 0 MN 350.00n 10.500u M35 16 19 17 16 MP 437.50n 7.0000u M36 19 17 16 16 MP 437.50n 7.0000u M37 17 21 7 0 MN 437.50n 10.325u M38 20 21 7 0 MN 437.50n 1.4000u M39 15 21 16 16 MP 350.00n 1.7500u M40 15 21 10 10 MN 350.00n 875.00n M41 7 21 6 6 MP 350.00n 175.00u M42 7 21 0 0 MN 350.00n 87.500u M43 1 21 6 6 MP 350.00n 17.500u M44 20 18 1 6 MP 350.00n 17.500u M45 20 21 0 0 MN 350.00n 8.7500u M46 20 18 0 0 MN 350.00n 8.7500u CPA 1 0 7.0000e-16 DPAA 1 6 D_PA 7.6562p DPPA 1 6 D_PP 35.875u CPB 2 0 7.0000e-16 DNAB 0 2 D_NA 4.5937p DNPB 0 2 D_NP 21.875u CPC 3 0 7.0000e-16 DPAC 3 6 D_PA 30.625p DPPC 3 6 D_PP 140.87u CPE 5 0 14.000f DNAE 0 5 D_NA 9.1875p DNPE 0 5 D_NP 22.750u DPAE 5 6 D_PA 18.375p DPPE 5 6 D_PP 43.750u CPF 6 0 21.000f CP10 7 0 24.500f DNA10 0 7 D_NA 86.822p DNP10 0 7 D_NP 203.70u DPA10 7 6 D_PA 153.12p DPP10 7 6 D_PP 351.75u CP11 8 0 7.0000f DNA11 0 8 D_NA 1.2633n DNP11 0 8 D_NP 2.8910m CP12 9 0 14.000f DNA12 0 9 D_NA 30.625p DNP12 0 9 D_NP 73.500u DPA12 9 6 D_PA 61.250p DPP12 9 6 D_PP 141.75u CP13 10 0 17.500f DNA13 0 10 D_NA 214.37p DNP13 0 10 D_NP 497.00u CP14 11 0 10.500f DNA14 0 11 D_NA 19.141p DNP14 0 11 D_NP 45.500u CP15 12 0 7.0000f DNA15 0 12 D_NA 160.78p DNP15 0 12 D_NP 371.00u CP16 13 0 10.500f DNA16 0 13 D_NA 183.75p DNP16 0 13 D_NP 423.50u CP17 14 0 24.500f DNA17 0 14 D_NA 118.67p DNP17 0 14 D_NP 276.50u CP19 16 0 3.5000f CP1A 17 0 21.000f DNA1A 0 17 D_NA 21.284p DNP1A 0 17 D_NP 52.150u CP1B 18 0 21.000f DNA1B 0 18 D_NA 9.1875p DNP1B 0 18 D_NP 22.750u DPA1B 18 6 D_PA 16.844p DPP1B 18 6 D_PP 42.000u CP1C 19 0 10.500f DNA1C 0 19 D_NA 12.250p DNP1C 0 19 D_NP 29.750u CP1D 20 0 17.500f DNA1D 0 20 D_NA 16.537p DNP1D 0 20 D_NP 43.050u DPA1D 20 6 D_PA 15.312p DPP1D 20 6 D_PP 36.750u CP1F 21 0 28.000f CP20 22 0 14.000f CP21 23 0 14.000f CP22 24 0 17.500f DNA22 0 24 D_NA 1.1561n DNP22 0 24 D_NP 2.6460m * .ENDS B_OPAD_MREQ_WC ******************************************************************************* ******************************************************************************* * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) BEST-CASE OUTPUT DRIVER MODEL * B_OPAD_MREQ_BC * ******************************************************************************* * .SUBCKT B_OPAD_MREQ_BC 6 16 10 22 23 21 24 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 6 VDD * 16 VDDX * 10 VSSX * 22 DATA * 23 ENABLE * 21 PWRSLP * 24 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (AT VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * |\ * | \ * DATA -------| -------- PAD * | / * |/| * | * | * | * ENABLE -----+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DPA0 24 16 D_PA 1.1282n DPP0 24 16 D_PP 2.5840m DPA1 19 16 D_PA 6.1250p DPP1 19 16 D_PP 15.750u DPA2 17 16 D_PA 6.1250p DPP2 17 16 D_PP 15.750u CP3 15 10 10.500f DNA5 10 15 D_NA 765.62f DNP5 10 15 D_NP 3.5000u DPA6 15 16 D_PA 1.5312p DPP6 15 16 D_PP 5.2500u DPA7 14 16 D_PA 54.819p DPP7 14 16 D_PP 128.80u DPA8 11 16 D_PA 45.937p DPP8 11 16 D_PP 106.75u DPA9 4 16 D_PA 1.3169n DPP9 4 16 D_PP 3.0135m M9 19 20 0 0 MN 437.50n 14.000u M10 17 18 0 0 MN 437.50n 14.000u M11 24 15 16 16 MP 1.0500u 3.1500u M12 24 16 14 16 MP 437.50n 61.250u M13 14 14 13 0 MN 350.00n 105.00u M14 13 13 12 0 MN 350.00n 105.00u M15 11 17 16 16 MP 437.50n 52.500u M16 11 17 14 0 MN 350.00n 21.875u M17 8 9 10 0 MN 437.50n 131.25u M18 24 7 8 0 MN 525.00n 1.3125m M19 5 23 6 6 MP 350.00n 21.000u M20 5 23 0 0 MN 350.00n 10.500u M21 24 14 4 16 MP 437.50n 1.2250m M22 4 11 16 16 MP 437.50n 280.00u M23 14 7 16 16 MP 3.5000u 1.4000u M24 14 10 24 0 MN 437.50n 8.7500u M25 12 7 10 0 MN 437.50n 78.750u M26 3 5 6 6 MP 350.00n 70.000u M27 9 22 3 6 MP 350.00n 70.000u M28 9 5 10 0 MN 350.00n 17.500u M29 9 22 10 0 MN 350.00n 17.500u Q30 10 16 24 6 PLPNP1 60 M31 18 22 6 6 MP 350.00n 9.6250u M32 18 23 6 6 MP 350.00n 9.6250u M33 2 22 0 0 MN 350.00n 10.500u M34 18 23 2 0 MN 350.00n 10.500u M35 16 19 17 16 MP 437.50n 7.0000u M36 19 17 16 16 MP 437.50n 7.0000u M37 17 21 7 0 MN 437.50n 10.325u M38 20 21 7 0 MN 437.50n 1.4000u M39 15 21 16 16 MP 350.00n 1.7500u M40 15 21 10 10 MN 350.00n 875.00n M41 7 21 6 6 MP 350.00n 175.00u M42 7 21 0 0 MN 350.00n 87.500u M43 1 21 6 6 MP 350.00n 17.500u M44 20 18 1 6 MP 350.00n 17.500u M45 20 21 0 0 MN 350.00n 8.7500u M46 20 18 0 0 MN 350.00n 8.7500u CPA 1 0 7.0000e-16 DPAA 1 6 D_PA 7.6562p DPPA 1 6 D_PP 35.875u CPB 2 0 7.0000e-16 DNAB 0 2 D_NA 4.5937p DNPB 0 2 D_NP 21.875u CPC 3 0 7.0000e-16 DPAC 3 6 D_PA 30.625p DPPC 3 6 D_PP 140.87u CPE 5 0 14.000f DNAE 0 5 D_NA 9.1875p DNPE 0 5 D_NP 22.750u DPAE 5 6 D_PA 18.375p DPPE 5 6 D_PP 43.750u CPF 6 0 21.000f CP10 7 0 24.500f DNA10 0 7 D_NA 86.822p DNP10 0 7 D_NP 203.70u DPA10 7 6 D_PA 153.12p DPP10 7 6 D_PP 351.75u CP11 8 0 7.0000f DNA11 0 8 D_NA 1.2633n DNP11 0 8 D_NP 2.8910m CP12 9 0 14.000f DNA12 0 9 D_NA 30.625p DNP12 0 9 D_NP 73.500u DPA12 9 6 D_PA 61.250p DPP12 9 6 D_PP 141.75u CP13 10 0 17.500f DNA13 0 10 D_NA 214.37p DNP13 0 10 D_NP 497.00u CP14 11 0 10.500f DNA14 0 11 D_NA 19.141p DNP14 0 11 D_NP 45.500u CP15 12 0 7.0000f DNA15 0 12 D_NA 160.78p DNP15 0 12 D_NP 371.00u CP16 13 0 10.500f DNA16 0 13 D_NA 183.75p DNP16 0 13 D_NP 423.50u CP17 14 0 24.500f DNA17 0 14 D_NA 118.67p DNP17 0 14 D_NP 276.50u CP19 16 0 3.5000f CP1A 17 0 21.000f DNA1A 0 17 D_NA 21.284p DNP1A 0 17 D_NP 52.150u CP1B 18 0 21.000f DNA1B 0 18 D_NA 9.1875p DNP1B 0 18 D_NP 22.750u DPA1B 18 6 D_PA 16.844p DPP1B 18 6 D_PP 42.000u CP1C 19 0 10.500f DNA1C 0 19 D_NA 12.250p DNP1C 0 19 D_NP 29.750u CP1D 20 0 17.500f DNA1D 0 20 D_NA 16.537p DNP1D 0 20 D_NP 43.050u DPA1D 20 6 D_PA 15.312p DPP1D 20 6 D_PP 36.750u CP1F 21 0 28.000f CP20 22 0 14.000f CP21 23 0 14.000f CP22 24 0 17.500f DNA22 0 24 D_NA 1.1561n DNP22 0 24 D_NP 2.6460m * .ENDS B_OPAD_MREQ_BC * * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) WORST-CASE I/O DRIVER MODEL * B_IOPAD_MCLK_WC * ******************************************************************************* * .SUBCKT B_IOPAD_MCLK_WC 14 26 22 34 33 31 32 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 14 VDD * 26 VDDX * 22 VSSX * 34 DATA * 33 ENABLE * 31 PWRSLP * 32 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE I/O DRIVER OUTPUT. * * * * * PWRSLP -- * * /| * / | * TO INTERNAL <---- |----+ * OF CHIP \ | | * \| | * | * | * |\ | * | \ | * DATA -------| --+----- PAD * | / * |/| * | * | * | * ENABLE -------+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * CP0 32 22 17.500f DNA2 22 32 D_NA 10.183p DNP2 22 32 D_NP 13.913u DPA4 32 26 D_PA 1.1255n DPP4 32 26 D_PP 2.5760m CP5 29 22 14.000f DNA7 22 29 D_NA 10.183p DNP7 22 29 D_NP 13.913u DPA8 28 26 D_PA 7.6562p DPP8 28 26 D_PP 19.250u DPA9 27 26 D_PA 13.781p DPP9 27 26 D_PP 35.000u DPAA 24 26 D_PA 7.6562p DPPA 24 26 D_PP 19.250u DPAB 23 26 D_PA 13.781p DPPB 23 26 D_PP 35.000u DPAC 21 26 D_PA 7.6562p DPPC 21 26 D_PP 19.250u DPAD 20 26 D_PA 15.312p DPPD 20 26 D_PP 36.750u DPAE 19 26 D_PA 54.819p DPPE 19 26 D_PP 128.80u DPAF 16 26 D_PA 45.937p DPPF 16 26 D_PP 106.75u DPA10 15 26 D_PA 1.6997n DPP10 15 26 D_PP 3.8903m DPA11 2 26 D_PA 7.6562p DPP11 2 26 D_PP 19.250u M10 30 30 0 0 MN 350.00n 5.2500u M11 28 29 30 0 MN 525.00n 4.3750u M12 28 29 27 26 MP 525.00n 8.7500u M13 27 27 26 26 MP 525.00n 7.0000u M14 25 25 0 0 MN 350.00n 5.2500u M15 24 29 25 0 MN 525.00n 4.3750u M16 24 29 23 26 MP 525.00n 8.7500u M17 23 23 26 26 MP 525.00n 7.0000u R18 29 32 200 TC=0,0 Q19 22 26 32 14 PLPNP1 60 Q20 22 26 29 14 PLPNP1 4 M21 20 21 26 26 MP 437.50n 17.500u M22 20 21 19 0 MN 350.00n 7.0000u M23 17 18 22 0 MN 437.50n 78.750u M24 19 22 32 0 MN 437.50n 8.7500u M25 19 18 26 26 MP 3.5000u 1.4000u M26 15 16 26 26 MP 437.50n 525.00u M27 32 19 15 26 MP 437.50n 1.2250m M28 15 20 26 26 MP 437.50n 192.50u M29 13 33 14 14 MP 350.00n 17.500u M30 13 33 0 0 MN 350.00n 8.7500u M31 32 18 12 0 MN 525.00n 1.3125m M32 16 21 19 0 MN 350.00n 21.875u M33 16 21 26 26 MP 437.50n 52.500u M34 11 11 17 0 MN 350.00n 105.00u M35 19 19 11 0 MN 350.00n 105.00u M36 32 26 19 26 MP 437.50n 61.250u M37 10 34 14 14 MP 437.50n 3.5000u M38 10 34 0 0 MN 437.50n 1.7500u M39 12 9 22 0 MN 437.50n 203.00u M40 9 13 22 0 MN 437.50n 11.375u M41 9 34 22 0 MN 437.50n 11.375u M42 9 8 22 0 MN 437.50n 11.375u M43 9 34 7 14 MP 437.50n 35.000u M44 7 8 6 14 MP 437.50n 35.000u M45 6 13 14 14 MP 437.50n 35.000u M46 8 10 14 14 MP 437.50n 10.500u M47 8 10 0 0 MN 437.50n 5.2500u M48 5 34 14 14 MP 350.00n 11.550u M49 5 33 14 14 MP 350.00n 11.550u M50 4 34 0 0 MN 350.00n 12.600u M51 5 33 4 0 MN 350.00n 12.600u M52 32 31 22 0 MN 1.0500u 1.5750u M53 21 31 0 0 MN 437.50n 14.525u M54 3 31 0 0 MN 437.50n 2.1000u M55 21 5 0 0 MN 437.50n 19.250u M56 2 3 0 0 MN 437.50n 19.250u M57 26 2 21 26 MP 437.50n 8.7500u M58 2 21 26 26 MP 437.50n 8.7500u M59 18 31 14 14 MP 350.00n 175.00u M60 18 31 0 0 MN 350.00n 87.500u M61 1 31 14 14 MP 350.00n 17.500u M62 3 5 1 14 MP 350.00n 17.500u M63 3 31 0 0 MN 350.00n 8.7500u M64 3 5 0 0 MN 350.00n 8.7500u CP12 1 0 7.0000e-16 DPA12 1 14 D_PA 7.6562p DPP12 1 14 D_PP 35.875u CP13 2 0 10.500f DNA13 0 2 D_NA 16.844p DNP13 0 2 D_NP 40.250u CP14 3 0 17.500f DNA14 0 3 D_NA 17.150p DNP14 0 3 D_NP 44.450u DPA14 3 14 D_PA 15.312p DPP14 3 14 D_PP 36.750u CP15 4 0 7.0000e-16 DNA15 0 4 D_NA 5.5125p DNP15 0 4 D_NP 26.075u CP16 5 0 21.000f DNA16 0 5 D_NA 11.025p DNP16 0 5 D_NP 26.950u DPA16 5 14 D_PA 20.212p DPP16 5 14 D_PP 49.700u CP17 6 0 7.0000e-16 DPA17 6 14 D_PA 15.312p DPP17 6 14 D_PP 70.875u CP18 7 0 7.0000e-16 DPA18 7 14 D_PA 15.312p DPP18 7 14 D_PP 70.875u CP19 8 0 14.000f DNA19 0 8 D_NA 4.5937p DNP19 0 8 D_NP 12.250u DPA19 8 14 D_PA 9.1875p DPP19 8 14 D_PP 22.750u CP1A 9 0 17.500f DNA1A 0 9 D_NA 29.859p DNP1A 0 9 D_NP 73.500u DPA1A 9 14 D_PA 30.625p DPP1A 9 14 D_PP 71.750u CP1B 10 0 14.000f DNA1B 0 10 D_NA 1.5312p DNP1B 0 10 D_NP 5.2500u DPA1B 10 14 D_PA 3.0625p DPP1B 10 14 D_PP 8.7500u CP1C 11 0 10.500f DNA1C 0 11 D_NA 183.75p DNP1C 0 11 D_NP 423.50u CP1D 12 0 7.0000f DNA1D 0 12 D_NA 1.3261n DNP1D 0 12 D_NP 3.0345m CP1E 13 0 14.000f DNA1E 0 13 D_NA 7.6562p DNP1E 0 13 D_NP 19.250u DPA1E 13 14 D_PA 15.312p DPP1E 13 14 D_PP 36.750u CP1F 14 0 28.000f CP21 16 0 10.500f DNA21 0 16 D_NA 19.141p DNP21 0 16 D_NP 45.500u CP22 17 0 7.0000f DNA22 0 17 D_NA 160.78p DNP22 0 17 D_NP 371.00u CP23 18 0 17.500f DNA23 0 18 D_NA 76.562p DNP23 0 18 D_NP 176.75u DPA23 18 14 D_PA 153.12p DPP23 18 14 D_PP 351.75u CP24 19 0 28.000f DNA24 0 19 D_NA 124.80p DNP24 0 19 D_NP 292.25u CP25 20 0 10.500f DNA25 0 20 D_NA 6.1250p DNP25 0 20 D_NP 15.750u CP26 21 0 28.000f DNA26 0 21 D_NA 29.553p DNP26 0 21 D_NP 71.050u CP27 22 0 24.500f DNA27 0 22 D_NA 277.77p DNP27 0 22 D_NP 645.40u CP29 24 0 7.0000f DNA29 0 24 D_NA 3.8281p DNP29 0 24 D_NP 10.500u CP2A 25 0 10.500f DNA2A 0 25 D_NA 8.4219p DNP2A 0 25 D_NP 22.750u CP2B 26 0 3.5000f CP2D 28 0 7.0000f DNA2D 0 28 D_NA 3.8281p DNP2D 0 28 D_NP 10.500u CP2E 29 0 14.000f CP2F 30 0 10.500f DNA2F 0 30 D_NA 8.4219p DNP2F 0 30 D_NP 22.750u CP31 31 0 24.500f CP32 32 0 17.500f DNA32 0 32 D_NA 1.1575n DNP32 0 32 D_NP 2.6509m CP33 33 0 14.000f CP34 34 0 21.000f * .ENDS B_IOPAD_MCLK_WC ******************************************************************************* ******************************************************************************* * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) BEST-CASE I/O DRIVER MODEL * B_IOPAD_MCLK_BC * ******************************************************************************* * .SUBCKT B_IOPAD_MCLK_BC 14 26 22 34 33 31 32 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 14 VDD * 26 VDDX * 22 VSSX * 34 DATA * 33 ENABLE * 31 PWRSLP * 32 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' IS LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE I/O DRIVER OUTPUT. * * * * * PWRSLP -- * * /| * / | * TO INTERNAL <---- |----+ * OF CHIP \ | | * \| | * | * | * |\ | * | \ | * DATA -------| --+----- PAD * | / * |/| * | * | * | * ENABLE -------+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * CP0 32 22 17.500f DNA2 22 32 D_NA 10.183p DNP2 22 32 D_NP 13.913u DPA4 32 26 D_PA 1.1255n DPP4 32 26 D_PP 2.5760m CP5 29 22 14.000f DNA7 22 29 D_NA 10.183p DNP7 22 29 D_NP 13.913u DPA8 28 26 D_PA 7.6562p DPP8 28 26 D_PP 19.250u DPA9 27 26 D_PA 13.781p DPP9 27 26 D_PP 35.000u DPAA 24 26 D_PA 7.6562p DPPA 24 26 D_PP 19.250u DPAB 23 26 D_PA 13.781p DPPB 23 26 D_PP 35.000u DPAC 21 26 D_PA 7.6562p DPPC 21 26 D_PP 19.250u DPAD 20 26 D_PA 15.312p DPPD 20 26 D_PP 36.750u DPAE 19 26 D_PA 54.819p DPPE 19 26 D_PP 128.80u DPAF 16 26 D_PA 45.937p DPPF 16 26 D_PP 106.75u DPA10 15 26 D_PA 1.6997n DPP10 15 26 D_PP 3.8903m DPA11 2 26 D_PA 7.6562p DPP11 2 26 D_PP 19.250u M10 30 30 0 0 MN 350.00n 5.2500u M11 28 29 30 0 MN 525.00n 4.3750u M12 28 29 27 26 MP 525.00n 8.7500u M13 27 27 26 26 MP 525.00n 7.0000u M14 25 25 0 0 MN 350.00n 5.2500u M15 24 29 25 0 MN 525.00n 4.3750u M16 24 29 23 26 MP 525.00n 8.7500u M17 23 23 26 26 MP 525.00n 7.0000u R18 29 32 200 TC=0,0 Q19 22 26 32 14 PLPNP1 60 Q20 22 26 29 14 PLPNP1 4 M21 20 21 26 26 MP 437.50n 17.500u M22 20 21 19 0 MN 350.00n 7.0000u M23 17 18 22 0 MN 437.50n 78.750u M24 19 22 32 0 MN 437.50n 8.7500u M25 19 18 26 26 MP 3.5000u 1.4000u M26 15 16 26 26 MP 437.50n 525.00u M27 32 19 15 26 MP 437.50n 1.2250m M28 15 20 26 26 MP 437.50n 192.50u M29 13 33 14 14 MP 350.00n 17.500u M30 13 33 0 0 MN 350.00n 8.7500u M31 32 18 12 0 MN 525.00n 1.3125m M32 16 21 19 0 MN 350.00n 21.875u M33 16 21 26 26 MP 437.50n 52.500u M34 11 11 17 0 MN 350.00n 105.00u M35 19 19 11 0 MN 350.00n 105.00u M36 32 26 19 26 MP 437.50n 61.250u M37 10 34 14 14 MP 437.50n 3.5000u M38 10 34 0 0 MN 437.50n 1.7500u M39 12 9 22 0 MN 437.50n 203.00u M40 9 13 22 0 MN 437.50n 11.375u M41 9 34 22 0 MN 437.50n 11.375u M42 9 8 22 0 MN 437.50n 11.375u M43 9 34 7 14 MP 437.50n 35.000u M44 7 8 6 14 MP 437.50n 35.000u M45 6 13 14 14 MP 437.50n 35.000u M46 8 10 14 14 MP 437.50n 10.500u M47 8 10 0 0 MN 437.50n 5.2500u M48 5 34 14 14 MP 350.00n 11.550u M49 5 33 14 14 MP 350.00n 11.550u M50 4 34 0 0 MN 350.00n 12.600u M51 5 33 4 0 MN 350.00n 12.600u M52 32 31 22 0 MN 1.0500u 1.5750u M53 21 31 0 0 MN 437.50n 14.525u M54 3 31 0 0 MN 437.50n 2.1000u M55 21 5 0 0 MN 437.50n 19.250u M56 2 3 0 0 MN 437.50n 19.250u M57 26 2 21 26 MP 437.50n 8.7500u M58 2 21 26 26 MP 437.50n 8.7500u M59 18 31 14 14 MP 350.00n 175.00u M60 18 31 0 0 MN 350.00n 87.500u M61 1 31 14 14 MP 350.00n 17.500u M62 3 5 1 14 MP 350.00n 17.500u M63 3 31 0 0 MN 350.00n 8.7500u M64 3 5 0 0 MN 350.00n 8.7500u CP12 1 0 7.0000e-16 DPA12 1 14 D_PA 7.6562p DPP12 1 14 D_PP 35.875u CP13 2 0 10.500f DNA13 0 2 D_NA 16.844p DNP13 0 2 D_NP 40.250u CP14 3 0 17.500f DNA14 0 3 D_NA 17.150p DNP14 0 3 D_NP 44.450u DPA14 3 14 D_PA 15.312p DPP14 3 14 D_PP 36.750u CP15 4 0 7.0000e-16 DNA15 0 4 D_NA 5.5125p DNP15 0 4 D_NP 26.075u CP16 5 0 21.000f DNA16 0 5 D_NA 11.025p DNP16 0 5 D_NP 26.950u DPA16 5 14 D_PA 20.212p DPP16 5 14 D_PP 49.700u CP17 6 0 7.0000e-16 DPA17 6 14 D_PA 15.312p DPP17 6 14 D_PP 70.875u CP18 7 0 7.0000e-16 DPA18 7 14 D_PA 15.312p DPP18 7 14 D_PP 70.875u CP19 8 0 14.000f DNA19 0 8 D_NA 4.5937p DNP19 0 8 D_NP 12.250u DPA19 8 14 D_PA 9.1875p DPP19 8 14 D_PP 22.750u CP1A 9 0 17.500f DNA1A 0 9 D_NA 29.859p DNP1A 0 9 D_NP 73.500u DPA1A 9 14 D_PA 30.625p DPP1A 9 14 D_PP 71.750u CP1B 10 0 14.000f DNA1B 0 10 D_NA 1.5312p DNP1B 0 10 D_NP 5.2500u DPA1B 10 14 D_PA 3.0625p DPP1B 10 14 D_PP 8.7500u CP1C 11 0 10.500f DNA1C 0 11 D_NA 183.75p DNP1C 0 11 D_NP 423.50u CP1D 12 0 7.0000f DNA1D 0 12 D_NA 1.3261n DNP1D 0 12 D_NP 3.0345m CP1E 13 0 14.000f DNA1E 0 13 D_NA 7.6562p DNP1E 0 13 D_NP 19.250u DPA1E 13 14 D_PA 15.312p DPP1E 13 14 D_PP 36.750u CP1F 14 0 28.000f CP21 16 0 10.500f DNA21 0 16 D_NA 19.141p DNP21 0 16 D_NP 45.500u CP22 17 0 7.0000f DNA22 0 17 D_NA 160.78p DNP22 0 17 D_NP 371.00u CP23 18 0 17.500f DNA23 0 18 D_NA 76.562p DNP23 0 18 D_NP 176.75u DPA23 18 14 D_PA 153.12p DPP23 18 14 D_PP 351.75u CP24 19 0 28.000f DNA24 0 19 D_NA 124.80p DNP24 0 19 D_NP 292.25u CP25 20 0 10.500f DNA25 0 20 D_NA 6.1250p DNP25 0 20 D_NP 15.750u CP26 21 0 28.000f DNA26 0 21 D_NA 29.553p DNP26 0 21 D_NP 71.050u CP27 22 0 24.500f DNA27 0 22 D_NA 277.77p DNP27 0 22 D_NP 645.40u CP29 24 0 7.0000f DNA29 0 24 D_NA 3.8281p DNP29 0 24 D_NP 10.500u CP2A 25 0 10.500f DNA2A 0 25 D_NA 8.4219p DNP2A 0 25 D_NP 22.750u CP2B 26 0 3.5000f CP2D 28 0 7.0000f DNA2D 0 28 D_NA 3.8281p DNP2D 0 28 D_NP 10.500u CP2E 29 0 14.000f CP2F 30 0 10.500f DNA2F 0 30 D_NA 8.4219p DNP2F 0 30 D_NP 22.750u CP31 31 0 24.500f CP32 32 0 17.500f DNA32 0 32 D_NA 1.1575n DNP32 0 32 D_NP 2.6509m CP33 33 0 14.000f CP34 34 0 21.000f * .ENDS B_IOPAD_MCLK_BC * * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) WORST-CASE OUTPUT DRIVER MODEL * B_OPAD_NMCLK_WC * ******************************************************************************* * .SUBCKT B_OPAD_NMCLK_WC 17 22 10 27 28 26 29 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 17 VDD * 22 VDDX * 10 VSSX * 27 DATA * 28 ENABLE * 26 PWRSLP * 29 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * |\ * | \ * DATA -------| -------- PAD * | / * |/| * | * | * | * ENABLE -----+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DPA0 29 22 D_PA 1.1282n DPP0 29 22 D_PP 2.5840m DPA1 23 22 D_PA 7.6562p DPP1 23 22 D_PP 19.250u DPA2 21 22 D_PA 7.6562p DPP2 21 22 D_PP 19.250u DPA3 19 22 D_PA 1.3781p DPP3 19 22 D_PP 7.1750u DPA4 8 22 D_PA 54.819p DPP4 8 22 D_PP 128.80u DPA5 5 22 D_PA 45.937p DPP5 5 22 D_PP 106.75u DPA6 4 22 D_PA 15.312p DPP6 4 22 D_PP 36.750u DPA7 3 22 D_PA 1.6997n DPP7 3 22 D_PP 3.8903m M8 24 26 25 0 MN 437.50n 2.1000u M9 23 26 25 0 MN 437.50n 14.525u M10 21 23 22 22 MP 437.50n 8.7500u M11 22 21 23 22 MP 437.50n 8.7500u M12 21 24 0 0 MN 437.50n 19.250u M13 23 20 0 0 MN 437.50n 19.250u M14 29 18 19 22 MP 525.00n 3.1500u M15 19 18 22 22 MP 525.00n 3.1500u M16 15 16 17 17 MP 437.50n 10.500u M17 15 16 0 0 MN 437.50n 5.2500u M18 13 14 17 17 MP 437.50n 35.000u M19 12 15 13 17 MP 437.50n 35.000u M20 11 27 12 17 MP 437.50n 35.000u M21 11 15 10 0 MN 437.50n 11.375u M22 11 27 10 0 MN 437.50n 11.375u M23 11 14 10 0 MN 437.50n 11.375u M24 9 11 10 0 MN 437.50n 203.00u M25 16 27 17 17 MP 437.50n 3.5000u M26 16 27 0 0 MN 437.50n 1.7500u M27 29 22 8 22 MP 437.50n 61.250u M28 8 8 7 0 MN 350.00n 105.00u M29 7 7 6 0 MN 350.00n 105.00u M30 5 23 22 22 MP 437.50n 52.500u M31 5 23 8 0 MN 350.00n 21.875u M32 29 25 9 0 MN 525.00n 1.3125m M33 14 28 17 17 MP 350.00n 17.500u M34 14 28 0 0 MN 350.00n 8.7500u M35 3 4 22 22 MP 437.50n 192.50u M36 29 8 3 22 MP 437.50n 1.2250m M37 3 5 22 22 MP 437.50n 525.00u M38 8 25 22 22 MP 3.5000u 1.4000u M39 8 10 29 0 MN 437.50n 8.7500u M40 6 25 10 0 MN 437.50n 78.750u M41 4 23 8 0 MN 350.00n 7.0000u M42 4 23 22 22 MP 437.50n 17.500u Q43 10 22 29 17 PLPNP1 60 M44 20 27 17 17 MP 350.00n 11.550u M45 20 28 17 17 MP 350.00n 11.550u M46 2 27 0 0 MN 350.00n 12.600u M47 20 28 2 0 MN 350.00n 12.600u M48 18 26 10 0 MN 350.00n 875.00n M49 18 26 22 17 MP 350.00n 1.7500u M50 25 26 17 17 MP 350.00n 175.00u M51 25 26 0 0 MN 350.00n 87.500u M52 1 26 17 17 MP 350.00n 17.500u M53 24 20 1 17 MP 350.00n 17.500u M54 24 26 0 0 MN 350.00n 8.7500u M55 24 20 0 0 MN 350.00n 8.7500u CP8 1 0 7.0000e-16 DPA8 1 17 D_PA 7.6562p DPP8 1 17 D_PP 35.875u CP9 2 0 7.0000e-16 DNA9 0 2 D_NA 5.5125p DNP9 0 2 D_NP 26.075u CPB 4 0 10.500f DNAB 0 4 D_NA 6.1250p DNPB 0 4 D_NP 15.750u CPC 5 0 10.500f DNAC 0 5 D_NA 19.141p DNPC 0 5 D_NP 45.500u CPD 6 0 7.0000f DNAD 0 6 D_NA 160.78p DNPD 0 6 D_NP 371.00u CPE 7 0 10.500f DNAE 0 7 D_NA 183.75p DNPE 0 7 D_NP 423.50u CPF 8 0 28.000f DNAF 0 8 D_NA 124.80p DNPF 0 8 D_NP 292.25u CP10 9 0 7.0000f DNA10 0 9 D_NA 1.3261n DNP10 0 9 D_NP 3.0345m CP11 10 0 24.500f DNA11 0 10 D_NA 277.16p DNP11 0 10 D_NP 644.00u CP12 11 0 17.500f DNA12 0 11 D_NA 29.859p DNP12 0 11 D_NP 73.500u DPA12 11 17 D_PA 30.625p DPP12 11 17 D_PP 71.750u CP13 12 0 7.0000e-16 DPA13 12 17 D_PA 15.312p DPP13 12 17 D_PP 70.875u CP14 13 0 7.0000e-16 DPA14 13 17 D_PA 15.312p DPP14 13 17 D_PP 70.875u CP15 14 0 14.000f DNA15 0 14 D_NA 7.6562p DNP15 0 14 D_NP 19.250u DPA15 14 17 D_PA 15.312p DPP15 14 17 D_PP 36.750u CP16 15 0 14.000f DNA16 0 15 D_NA 4.5937p DNP16 0 15 D_NP 12.250u DPA16 15 17 D_PA 9.1875p DPP16 15 17 D_PP 22.750u CP17 16 0 14.000f DNA17 0 16 D_NA 1.5312p DNP17 0 16 D_NP 5.2500u DPA17 16 17 D_PA 3.0625p DPP17 16 17 D_PP 8.7500u CP18 17 0 28.000f CP19 18 0 14.000f DNA19 0 18 D_NA 765.62f DNP19 0 18 D_NP 3.5000u DPA19 18 17 D_PA 1.5312p DPP19 18 17 D_PP 5.2500u CP1B 20 0 21.000f DNA1B 0 20 D_NA 11.025p DNP1B 0 20 D_NP 26.950u DPA1B 20 17 D_PA 20.212p DPP1B 20 17 D_PP 49.700u CP1D 21 0 10.500f DNA1D 0 21 D_NA 16.844p DNP1D 0 21 D_NP 40.250u CP1E 22 0 7.0000f DPA1E 22 17 D_PA 1.5312p DPP1E 22 17 D_PP 5.2500u CP1F 23 0 28.000f DNA1F 0 23 D_NA 29.553p DNP1F 0 23 D_NP 71.050u CP20 24 0 17.500f DNA20 0 24 D_NA 17.150p DNP20 0 24 D_NP 44.450u DPA20 24 17 D_PA 15.312p DPP20 24 17 D_PP 36.750u CP21 25 0 24.500f DNA21 0 25 D_NA 91.109p DNP21 0 25 D_NP 213.50u DPA21 25 17 D_PA 153.12p DPP21 25 17 D_PP 351.75u CP22 26 0 28.000f CP23 27 0 21.000f CP24 28 0 14.000f CP25 29 0 17.500f DNA25 0 29 D_NA 1.1561n DNP25 0 29 D_NP 2.6460m * .ENDS B_OPAD_NMCLK_WC ******************************************************************************* ******************************************************************************* * COPYRIGHT (c) 1996 Digital Equipment Corporation * All rights reserved. * *The information in this software is subject to change without notice *and should not be construed as a commitment by Digital Equipment Corporation. * *Digital assumes no responsibility for the use or reliability of its software *on equipment which is not supplied by Digital. * ******************************************************************************* * * SA110 (StrongArm) BEST-CASE OUTPUT DRIVER MODEL * B_OPAD_NMCLK_BC * ******************************************************************************* * .SUBCKT B_OPAD_NMCLK_BC 17 22 10 27 28 26 29 * * SUBCKT CALL IS: VDD VDDX VSSX DATA ENABLE PWRSLP PAD * * NODE NAME * --------------- * 17 VDD * 22 VDDX * 10 VSSX * 27 DATA * 28 ENABLE * 26 PWRSLP * 29 PAD * * 'VDD' IS THE 1.8V POWER SUPPLY CONNECTION * * 'VDDX' IS THE 3.30V POWER SUPPLY CONNECTION * * 'VSSX' IS THE GROUND RETURN OF VDDX * * 'DATA' IS THE INPUT DATA FROM THE CORE OF THE CHIP TO THE DRIVER * * 'ENABLE' IS THE DATE ENABLE CONTROL: * 'ENABLE' HI (AT VDD) -- OUTPUT IS ACTIVE * 'ENABLE' LO (AT VSS) -- OUTPUT IS AT TRI-STATE * * 'PWRSLP' IS THE SLEEP MODE CONTROL * 'PWRSLP' LO (AT VSSX) DURING NORMAL OPERATION * AND HIGH (VDDX) AT SLEEP MODE. * * 'PAD' IS THE BONDING PAD OF THE DRIVER OUTPUT. * * * * * PWRSLP -- * * |\ * | \ * DATA -------| -------- PAD * | / * |/| * | * | * | * ENABLE -----+ * * ******************************************************************************* * * ALL MOS AND DIODE MODELS ARE IN 3 SEPARATE FILES, pnp6_1_5.mod, * cmos6_bsim3_ss.mod and cmos6_bsim3_ff.mod FOR SS AND FF RESPECTIVELY. * USE THE SS MODELS IN THE WORST CASE RUN AND FF MODELS IN THE BEST CASE RUN. * THIS CAN BE ACCOMPLISHED BY USING THE ".INCLUDE" STATEMENT IN YOUR MAIN * MODEL AND MAKE SURE THAT THE FILES ARE IN THE PROPER PATH. * ******************************************************************************* * DPA0 29 22 D_PA 1.1282n DPP0 29 22 D_PP 2.5840m DPA1 23 22 D_PA 7.6562p DPP1 23 22 D_PP 19.250u DPA2 21 22 D_PA 7.6562p DPP2 21 22 D_PP 19.250u DPA3 19 22 D_PA 1.3781p DPP3 19 22 D_PP 7.1750u DPA4 8 22 D_PA 54.819p DPP4 8 22 D_PP 128.80u DPA5 5 22 D_PA 45.937p DPP5 5 22 D_PP 106.75u DPA6 4 22 D_PA 15.312p DPP6 4 22 D_PP 36.750u DPA7 3 22 D_PA 1.6997n DPP7 3 22 D_PP 3.8903m M8 24 26 25 0 MN 437.50n 2.1000u M9 23 26 25 0 MN 437.50n 14.525u M10 21 23 22 22 MP 437.50n 8.7500u M11 22 21 23 22 MP 437.50n 8.7500u M12 21 24 0 0 MN 437.50n 19.250u M13 23 20 0 0 MN 437.50n 19.250u M14 29 18 19 22 MP 525.00n 3.1500u M15 19 18 22 22 MP 525.00n 3.1500u M16 15 16 17 17 MP 437.50n 10.500u M17 15 16 0 0 MN 437.50n 5.2500u M18 13 14 17 17 MP 437.50n 35.000u M19 12 15 13 17 MP 437.50n 35.000u M20 11 27 12 17 MP 437.50n 35.000u M21 11 15 10 0 MN 437.50n 11.375u M22 11 27 10 0 MN 437.50n 11.375u M23 11 14 10 0 MN 437.50n 11.375u M24 9 11 10 0 MN 437.50n 203.00u M25 16 27 17 17 MP 437.50n 3.5000u M26 16 27 0 0 MN 437.50n 1.7500u M27 29 22 8 22 MP 437.50n 61.250u M28 8 8 7 0 MN 350.00n 105.00u M29 7 7 6 0 MN 350.00n 105.00u M30 5 23 22 22 MP 437.50n 52.500u M31 5 23 8 0 MN 350.00n 21.875u M32 29 25 9 0 MN 525.00n 1.3125m M33 14 28 17 17 MP 350.00n 17.500u M34 14 28 0 0 MN 350.00n 8.7500u M35 3 4 22 22 MP 437.50n 192.50u M36 29 8 3 22 MP 437.50n 1.2250m M37 3 5 22 22 MP 437.50n 525.00u M38 8 25 22 22 MP 3.5000u 1.4000u M39 8 10 29 0 MN 437.50n 8.7500u M40 6 25 10 0 MN 437.50n 78.750u M41 4 23 8 0 MN 350.00n 7.0000u M42 4 23 22 22 MP 437.50n 17.500u Q43 10 22 29 17 PLPNP1 60 M44 20 27 17 17 MP 350.00n 11.550u M45 20 28 17 17 MP 350.00n 11.550u M46 2 27 0 0 MN 350.00n 12.600u M47 20 28 2 0 MN 350.00n 12.600u M48 18 26 10 0 MN 350.00n 875.00n M49 18 26 22 17 MP 350.00n 1.7500u M50 25 26 17 17 MP 350.00n 175.00u M51 25 26 0 0 MN 350.00n 87.500u M52 1 26 17 17 MP 350.00n 17.500u M53 24 20 1 17 MP 350.00n 17.500u M54 24 26 0 0 MN 350.00n 8.7500u M55 24 20 0 0 MN 350.00n 8.7500u CP8 1 0 7.0000e-16 DPA8 1 17 D_PA 7.6562p DPP8 1 17 D_PP 35.875u CP9 2 0 7.0000e-16 DNA9 0 2 D_NA 5.5125p DNP9 0 2 D_NP 26.075u CPB 4 0 10.500f DNAB 0 4 D_NA 6.1250p DNPB 0 4 D_NP 15.750u CPC 5 0 10.500f DNAC 0 5 D_NA 19.141p DNPC 0 5 D_NP 45.500u CPD 6 0 7.0000f DNAD 0 6 D_NA 160.78p DNPD 0 6 D_NP 371.00u CPE 7 0 10.500f DNAE 0 7 D_NA 183.75p DNPE 0 7 D_NP 423.50u CPF 8 0 28.000f DNAF 0 8 D_NA 124.80p DNPF 0 8 D_NP 292.25u CP10 9 0 7.0000f DNA10 0 9 D_NA 1.3261n DNP10 0 9 D_NP 3.0345m CP11 10 0 24.500f DNA11 0 10 D_NA 277.16p DNP11 0 10 D_NP 644.00u CP12 11 0 17.500f DNA12 0 11 D_NA 29.859p DNP12 0 11 D_NP 73.500u DPA12 11 17 D_PA 30.625p DPP12 11 17 D_PP 71.750u CP13 12 0 7.0000e-16 DPA13 12 17 D_PA 15.312p DPP13 12 17 D_PP 70.875u CP14 13 0 7.0000e-16 DPA14 13 17 D_PA 15.312p DPP14 13 17 D_PP 70.875u CP15 14 0 14.000f DNA15 0 14 D_NA 7.6562p DNP15 0 14 D_NP 19.250u DPA15 14 17 D_PA 15.312p DPP15 14 17 D_PP 36.750u CP16 15 0 14.000f DNA16 0 15 D_NA 4.5937p DNP16 0 15 D_NP 12.250u DPA16 15 17 D_PA 9.1875p DPP16 15 17 D_PP 22.750u CP17 16 0 14.000f DNA17 0 16 D_NA 1.5312p DNP17 0 16 D_NP 5.2500u DPA17 16 17 D_PA 3.0625p DPP17 16 17 D_PP 8.7500u CP18 17 0 28.000f CP19 18 0 14.000f DNA19 0 18 D_NA 765.62f DNP19 0 18 D_NP 3.5000u DPA19 18 17 D_PA 1.5312p DPP19 18 17 D_PP 5.2500u CP1B 20 0 21.000f DNA1B 0 20 D_NA 11.025p DNP1B 0 20 D_NP 26.950u DPA1B 20 17 D_PA 20.212p DPP1B 20 17 D_PP 49.700u CP1D 21 0 10.500f DNA1D 0 21 D_NA 16.844p DNP1D 0 21 D_NP 40.250u CP1E 22 0 7.0000f DPA1E 22 17 D_PA 1.5312p DPP1E 22 17 D_PP 5.2500u CP1F 23 0 28.000f DNA1F 0 23 D_NA 29.553p DNP1F 0 23 D_NP 71.050u CP20 24 0 17.500f DNA20 0 24 D_NA 17.150p DNP20 0 24 D_NP 44.450u DPA20 24 17 D_PA 15.312p DPP20 24 17 D_PP 36.750u CP21 25 0 24.500f DNA21 0 25 D_NA 91.109p DNP21 0 25 D_NP 213.50u DPA21 25 17 D_PA 153.12p DPP21 25 17 D_PP 351.75u CP22 26 0 28.000f CP23 27 0 21.000f CP24 28 0 14.000f CP25 29 0 17.500f DNA25 0 29 D_NA 1.1561n DNP25 0 29 D_NP 2.6460m * .ENDS B_OPAD_NMCLK_BC ********************************************************************** * BSIM3v3 * P-EPI CMOS-VI ff Model File Rev.: 2.0 RR 3-May-1996 * N-channel Device .MODEL MN NMOS + LEVEL=49 TNOM=27 + TOX=6.7E-09 XJ=1E-07 NCH=1E+17 VTH0=0.1782 + K1=0.3267 K2=-0.01729 K3=3.791 K3B=0 + W0=2.725E-08 NLX=5.15E-07 DVT0W=0 DVT1W=5.3E+06 + DVT2W=-0.032 DVT0=2.101 DVT1=0.4853 DVT2=-0.03521 + U0=565.6 UA=8.724E-10 UB=1.483E-18 UC=-5.45E-11 + VSAT=1.082E+05 A0=3.017 AGS=0.3742 B0=0 + B1=0 KETA=0.006574 A1=0 A2=1 + RDSW=352 PRWG=0 PRWB=0 WR=1 + WINT=4E-08 LINT=3.565E-08 DWG=0 DWB=0 + VOFF=-0.05394 NFACTOR=1.005 ETA0=0.1339 ETAB=-0.001269 + DSUB=0.5774 CIT=0 CDSC=-0.01755 CDSCD=0 + CDSCB=-0.01735 PCLM=1.148E-05 PDIBLC1=1 PDIBLC2=0.0086 + PDIBLCB=0 DROUT=1 PSCBE1=4.24E+08 PSCBE2=1E-05 + PVAG=0 DELTA=0.01 ALPHA0=0 BETA0=30 + NGATE=1E+21 MOBMOD=1 CAPMOD=0 XPART=0 + CGSL=2.524E-10 CGDL=2.524E-10 CKAPPA=0.426 + CLC=0 CLE=0 DLC=9.364E-08 DWC=4E-08 + PRT=0 UTE=-1.582 KT1=-0.2486 KT1L=0 + KT2=-0.0882 UA1=4.31E-09 UB1=-7.61E-18 UC1=-5.6E-11 + AT=1E+04 WL=0 WLN=1 WW=0 + WWN=1 WWL=0 LL=0 LLN=1 + LW=0 LWN=1 * Parasitics + CGDO=0.65E-10 CGSO=0.65E-10 CGBO=4.00E-10 JS=5.3E-08 * * P-channel Device .MODEL MP PMOS + LEVEL=49 TNOM=27 + TOX=6.7E-09 XJ=2E-07 NCH=1E+17 VTH0=-0.2072 + K1=0.4051 K2=-1E-06 K3=-0.8062 K3B=0 + W0=1E-07 NLX=1E-08 DVT0W=0 DVT1W=5.3E+06 + DVT2W=-0.032 DVT0=0.9182 DVT1=0.7248 DVT2=-0.5794 + U0=99.25 UA=1E-10 UB=6.505E-19 UC=-2.809E-10 + VSAT=1.299E+05 A0=2.808 AGS=0.3599 B0=0 + B1=0 KETA=0 A1=0 A2=1 + RDSW=853.9 PRWG=0 PRWB=0 WR=1 + WINT=4E-08 LINT=5.381E-08 DWG=0 DWB=0 + VOFF=-0.004432 NFACTOR=1.224 ETA0=1 ETAB=-0.008844 + DSUB=1.648 CIT=0 CDSC=-0.00019 CDSCD=0 + CDSCB=-4.868E-05 PCLM=10 PDIBLC1=7.352E-06 PDIBLC2=0.0086 + PDIBLCB=0 DROUT=0.56 PSCBE1=4.24E+08 PSCBE2=1E-05 + PVAG=0 DELTA=0.01 ALPHA0=0 BETA0=30 + NGATE=1E+21 MOBMOD=1 CAPMOD=0 XPART=0 + CGSL=2.316E-10 CGDL=2.316E-10 CKAPPA=1.926 + CLC=0 CLE=0.9322 DLC=8.138E-08 DWC=4E-08 + PRT=0 UTE=-1.144 KT1=-0.2536 KT1L=0 + KT2=-0.1196 UA1=6.559E-10 UB1=-1.322E-18 UC1=-5.6E-11 + AT=0 WL=0 WLN=1 WW=0 + WWN=1 WWL=0 LL=0 LLN=1 + LW=0 LWN=1 * Parasitics + CGDO=0.55E-10 CGSO=0.55E-10 CGBO=4.00E-10 JS=5.6E-07 * * N-CHANNEL BOTTOM WALL DIODE MODEL .MODEL D_NA D + CJO=0.60E-04 VJ=0.45 M=0.15 IS=5.3E-08 FC=0.5 XTI=3.0 N=1.05 * N-CHANNEL SIDEWALL DIODE MODEL .MODEL D_NP D + CJO=2.65E-10 VJ=0.80 M=0.36 IS=2.7E-13 FC=0.5 XTI=3.0 N=1.10 * N-CHANNEL INNER SIDEWALL DIODE MODEL .MODEL D_NI D + CJO=2.10E-10 VJ=0.45 M=0.34 IS=2.7E-13 FC=0.5 XTI=3.0 N=1.10 * P-CHANNEL BOTTOM WALL DIODE MODEL .MODEL D_PA D + CJO=9.50E-04 VJ=0.87 M=0.47 IS=5.6E-07 FC=0.5 XTI=3.0 N=1.07 * P-CHANNEL SIDEWALL DIODE MODEL .MODEL D_PP D + CJO=2.20E-10 VJ=0.66 M=0.26 IS=7.8E-13 FC=0.5 XTI=3.0 N=1.09 * P-CHANNEL INNER SIDEWALL DIODE MODEL .MODEL D_PI D + CJO=2.05E-10 VJ=0.64 M=0.31 IS=7.8E-13 FC=0.5 XTI=3.0 N=1.09 * WELL BOTTOM WALL DIODE MODEL .MODEL D_WA D + CJO=1.35E-04 VJ=0.45 M=0.20 IS=5.6E-08 FC=0.5 XTI=3.0 N=1.09 * WELL SIDEWALL DIODE MODEL .MODEL D_WP D + CJO=1.25E-10 VJ=0.45 M=0.12 IS=2.2E-12 FC=0.5 XTI=3.0 N=1.21 ******************************************************************** ********************************************************************** * BSIM3v3 * P-EPI CMOS-VI ss Model File Rev.: 2.0 RR 3-May-1996 * N-channel Device .MODEL MN NMOS + LEVEL=49 TNOM=27 + TOX=7.2E-09 XJ=1E-07 NCH=1E+17 VTH0=0.243 + K1=0.3283 K2=-0.01442 K3=3.516 K3B=0 + W0=0 NLX=5.145E-07 DVT0W=0 DVT1W=5.3E+06 + DVT2W=-0.032 DVT0=1.022 DVT1=0.4091 DVT2=0 + U0=482 UA=1E-10 UB=1.833E-18 UC=-7.438E-11 + VSAT=1.194E+05 A0=2.844 AGS=0.4346 B0=0 + B1=0 KETA=0.03662 A1=0 A2=1 + RDSW=409.1 PRWG=0 PRWB=0 WR=1 + WINT=1.1E-07 LINT=4.851E-09 DWG=0 DWB=0 + VOFF=-0.03486 NFACTOR=0.9363 ETA0=0.08092 ETAB=-0.03435 + DSUB=0.4663 CIT=0 CDSC=-0.000181 CDSCD=0 + CDSCB=0.0001287 PCLM=0.4064 PDIBLC1=0.08835 PDIBLC2=0.0086 + PDIBLCB=0 DROUT=1 PSCBE1=4.24E+08 PSCBE2=1E-05 + PVAG=0 DELTA=0.01 ALPHA0=0 BETA0=30 + NGATE=1E+21 MOBMOD=1 CAPMOD=0 XPART=0 + CGSL=2.313E-10 CGDL=2.313E-10 CKAPPA=0.5253 + CLC=0 CLE=0 DLC=6.833E-08 DWC=1.1E-07 + PRT=0 UTE=-1.511 KT1=-0.3329 KT1L=0 + KT2=-0.01692 UA1=4.31E-09 UB1=-7.61E-18 UC1=-5.6E-11 + AT=1E+04 WL=0 WLN=1 WW=0 + WWN=1 WWL=0 LL=0 LLN=1 + LW=0 LWN=1 * Parasitics + CGDO=1.35E-10 CGSO=1.35E-10 CGBO=4.00E-10 JS=5.3E-08 * * P-channel Device .MODEL MP PMOS + LEVEL=49 TNOM=27 + TOX=7.2E-09 XJ=2E-07 NCH=1E+17 VTH0=-0.3707 + K1=0.4349 K2=-1E-06 K3=-1.009 K3B=0 + W0=1E-07 NLX=1E-08 DVT0W=0 DVT1W=5.3E+06 + DVT2W=-0.032 DVT0=0.2073 DVT1=0.5541 DVT2=-1.365 + U0=138.7 UA=1.257E-09 UB=2.442E-19 UC=-1.451E-10 + VSAT=2.474E+05 A0=2.029 AGS=0.3249 B0=0 + B1=0 KETA=0 A1=0 A2=0.9 + RDSW=951.5 PRWG=0 PRWB=0 WR=1 + WINT=1.1E-07 LINT=1.953E-08 DWG=0 DWB=0 + VOFF=-0.07927 NFACTOR=1.557 ETA0=1 ETAB=-0.847 + DSUB=1.52 CIT=0 CDSC=-0.00339 CDSCD=0 + CDSCB=-0.003073 PCLM=10 PDIBLC1=7.352E-06 PDIBLC2=0.0086 + PDIBLCB=0 DROUT=0.56 PSCBE1=4.24E+08 PSCBE2=1E-05 + PVAG=0 DELTA=0.01 ALPHA0=0 BETA0=30 + NGATE=1E+21 MOBMOD=1 CAPMOD=0 XPART=0 + CGSL=2.119E-10 CGDL=2.119E-10 CKAPPA=2.435 + CLC=0 CLE=0.9322 DLC=6.199E-08 DWC=1.1E-07 + PRT=0 UTE=-1.308 KT1=-0.2641 KT1L=0 + KT2=-0.01239 UA1=1E-10 UB1=-1.322E-18 UC1=-5.6E-11 + AT=0 WL=0 WLN=1 WW=0 + WWN=1 WWL=0 LL=0 LLN=1 + LW=0 LWN=1 * Parasitics + CGDO=1.45E-10 CGSO=1.45E-10 CGBO=4.00E-10 JS=5.6E-07 * * N-CHANNEL BOTTOM WALL DIODE MODEL .MODEL D_NA D + CJO=1.00E-04 VJ=0.45 M=0.15 IS=5.3E-08 FC=0.5 XTI=3.0 N=1.05 * N-CHANNEL SIDEWALL DIODE MODEL .MODEL D_NP D + CJO=3.55E-10 VJ=0.80 M=0.36 IS=2.7E-13 FC=0.5 XTI=3.0 N=1.10 * N-CHANNEL INNER SIDEWALL DIODE MODEL .MODEL D_NI D + CJO=3.10E-10 VJ=0.45 M=0.34 IS=2.7E-13 FC=0.5 XTI=3.0 N=1.10 * P-CHANNEL BOTTOM WALL DIODE MODEL .MODEL D_PA D + CJO=11.5E-04 VJ=0.87 M=0.47 IS=5.6E-07 FC=0.5 XTI=3.0 N=1.07 * P-CHANNEL SIDEWALL DIODE MODEL .MODEL D_PP D + CJO=3.00E-10 VJ=0.66 M=0.26 IS=7.8E-13 FC=0.5 XTI=3.0 N=1.09 * P-CHANNEL INNER SIDEWALL DIODE MODEL .MODEL D_PI D + CJO=2.75E-10 VJ=0.64 M=0.31 IS=7.8E-13 FC=0.5 XTI=3.0 N=1.09 * WELL BOTTOM WALL DIODE MODEL .MODEL D_WA D + CJO=2.25E-04 VJ=0.45 M=0.20 IS=5.6E-08 FC=0.5 XTI=3.0 N=1.09 * WELL SIDEWALL DIODE MODEL .MODEL D_WP D + CJO=2.05E-10 VJ=0.45 M=0.12 IS=2.2E-12 FC=0.5 XTI=3.0 N=1.21 ******************************************************************** * PNP6_1_5.MOD * * Parasitic Vertical PNP BJT Model in CMOS-6 * * Rev 0.1 Warren Anderson 6-sep-95 * Rev 0.2 WA/RHW 17-oct-95 Added parameters supplied by Warren 11-oct, * IS BF VAF XTB BR * RHW 20-oct-95 Corrected General Form by adding model name * Uncommented last two lines in model * Rev 1.1 RHW 10-jan-96 Updated IS,BF,NF from averaged data supplied by * Warren Anderson 30-oct-95 * Not named 1.0 due to possible conflict with previous * version entered in Notes file as 1.0 * Rev 1.2 RHW 11-jan-96 Added CJE, VJE, MJE based on CMOS6 WCF rev. 1.0 * Rev 1.3 RHW 17-jan-96 Left-justified all model lines so tools can read * Rev 1.4 RHW 1-mar-96 Updated major parameters with latest from Warren * dated 6 feb 96, based on XD0343-06 * Applies to T=20C, accuracy not claimed at other temps. * * Rev 1.5 RHW 14-mar-96 XTB from new model released by Warren, which * restores accuracy at T=100, * Cap params based on 2.0 tech file, also from * Warren's new model, collector cap params added * ISE,NE,ISC,NC matches leakage to 2.0 tech file * Reformatted, related parameters grouped together * RC=0 to match Warren's data, he extracted w/rc=0 * * Parameters supplied by Warren Anderson. * This file created and maintained by R. Woodside. * * General Form: QXXXXXX NC NB NE PLPNP1 * * NC, NB and NE are the collector, base and emitter nodes, respectively. * PLPNP1 is the model name. * AREA is the area factor. If omitted, a value of 1.0 is assumed. * AREA=1.0 => 200x5cdu P+ finger, surrounded by well plug at 4cdu spacing * Accuracy is re-established over temperature range 0/100C. * .MODEL PLPNP1 PNP + IS=4.73e-17 BF=8.4 NF=1.018 IKF=4.19E-3 VAF=70 + IRB=0 RB=60 RBM=0.2 RE=0 RC=0 + ISE=1.9E-14 NE=1.69 ISC=2.1E-15 NC=1.32 + BR=0.15 NR=1.25 IKR=5.0512E-9 VAR=10 + XTI=3 XTB=1.36 + CJE=5.08E-14 VJE=0.77 MJE=0.38 + CJC=9.28E-15 VJC=0.44 MJC=0.14 * .END