[Intel Navigation Header]

Intel Architecture MMX(TM) Technology


Appendix A
MMX TM INSTRUCTION SET

The table below contains a summary of the MMX instruction set. The instruction mnemonics below are the base set of mnemonics; most instructions have multiple variations (e.g., packed-byte, -word, and -dword variations). Complete information on the MMX instructions may be found in the Intel Architecture MMX TM Technology Programmer’s Reference Manual (Order Number 243007).

Table A-1. Intel Architecture MMXTM Instruction Set
Packed Arithmetic Wrap Around Signed Sat Unsigned Sat
Addition PADD PADDS PADDUS
Subtraction PSUB PSUBS PSUBUS
Multiplication PMULL/H
Multiply & add PMADD
Shift right Arithmetic PSRA
Compare PCMPcc
Conversions Regular Signed Sat Unsigned Sat
Pack PACKSS PACKUS
Unpack PUNPCKL/H
Logical Operations Packed Full 64-bit
And PAND
And not PANDN
Or POR
Exclusive or PXOR
Shift left PSLL PSLL
Shift right PSRL PSRL
Transfers and Memory Operations 32-bit 64-bit
Register-register move MOVD MOVQ
Load from memory MOVD MOVQ
Store to memory MOVD MOVQ
Miscellaneous
Empty multimedia state EMMS


Trademark Information