MCS® 96 Microcontroller Overview MCS 296 Microcontroller Overview HSIO Family EPA Family Motion Control Family CAN Product Family (Express) Intel MCS 296 Microcontroller Backgrounder Intel Product Selector ...fast, easy way to find the right product for your design. Intel Zapcode on the Web. In just a few minutes you can use this new software tool to send ROM media to Intel from anywhere in the world via the web.

MCS 96 Microcontroller Overview
Intel^® MCS 96 microcontroller family of products are popular for 16-bit embedded microcontrollers. The 8XC196 products are found in a variety of embedded applications. The high-performance register to register architecture is well suited for complex real-time control applications such as hard disk drives, modems, printers, pattern recognition and motor control. Our broad portfolio of 8XC196 microcontroller products has been designed to meet your varying peripheral, memory size, addressability and performance requirements.

The 8XC196 family shares a common core architecture which is register based. The MCS 96 microcontroller register architecture eliminates the accumulator bottleneck and enables fast context switching. All devices have bit, byte, word and some 32-bit operations. The table below summarizes the capture and generation of high speed signals on the HSIO and EPA.

OPERATION	16 MHz	20 MHz	25 MHz	50 MHz
HSI (High speed input)	1.125 us	900 ns
HSO (High speed output)	1 us	800 ns
EPA (Event processor array)	250 ns	200 ns	160 ns	80 ns

The 8XC196 Bus Controller features programmable wait state generation. 8- or 16-bit bus width and features a HOLD/HLDA protocol for multiprocessor systems. The 8XC196NP/NU have dynamically selectable multiplexed/demultiplexed bus and a chip select unit.

The MCS 96 microcontroller product family has three distinct product lines. The most recent products form the EPA Family. This family of devices has the advanced peripherals which include a flexible input/output system and EPA (Event Processor Array). The HSIO Family consists of devices that have the High Speed Input/Output sub-system. The Motor Control Family is comprised of devices that support motor control applications. This family also uses the EPA system for I/O control.

FEATURES	BENEFITS
16-bit CPU	High Performance. Up to 50 MHz.
On-chip memory	Low cost. Cost-effective solution
Register-to-register architecture	Efficient. More compact code than accumulator-based architecture, which allows more efficient use of memory Unlimited usage. Minimum of 232 registers can be directly addressed at any time
Three operand instructions	Create efficient code. Preserve the source data
Bus controller features programmable wait-state generation and 8- or 16-bit bus widths	Economical. Efficient usage of wide variety of memory and peripheral devices
Flat addressability of large register files	Fewer barriers. Avoids artificial limitation of barriers of segmented files
Three distinct product lines: - Event Processor Array - High Speed Input/Output - Motion Control	Advanced. Peripherals include configurable input/output ports and modular event processor array structure Speed. Devices with high-speed input FIFO and output system Waveform. Uses waveform generator and event processor array system for input/output

MCS 296 Microcontroller Overview
Intel's MCS 296 microcontroller is the latest addition to the Intel MCS 96 microcontroller family. The 80296SA is performance enhanced from the 8XC196NP and 8XC196NU controllers while maintaining binary code compatibility. Hence, the 80296SA can be dropped into a 8XC196NP/NU socket and immediately boost system performance.

The 80296SA exhibits improved math performance over previous architectures making it suitable for embedded digital signal processing and feedback control systems. The 80296SA can perform 12.5 DSP MIPS and 16 general purpose MIPS. The 80296SA has 512 bytes of register RAM and 2 Kbytes of code/data RAM. The 80296SA utilizes the same peripherals as the 8XC196NP/NU. Additionally, like the 8XC196NU, the 80296SA includes a phase-lock loop. With the phase lock loop, an external clock drives the device at one half or one quarter the maximum internal clock frequency. Therefore, the system is designed for lower frequency external clock or oscillators while maintaining the maximum internal operating frequency. Enhancements to the chip select unit, the interrupts, and the timers were also implemented. The windowing scheme was enhanced to include the windowing of some external memory locations for direct addressing.

The 80296SA is available in 100L QFP which is pin compatible with the 8XC196NU/NP for ease of upgradability. For existing 8XC196NU/NP users, the 80296SA provides an easy performance upgrade which translates to faster time to market. For customers who are looking for 16 bit microcontroller with an extra boost to performance, the 80296SA provides the performance edge required at an affordable price.

FEATURES	BENEFITS
50 MHz Operation	Higher Performance
Binary-code compatible with Intel's 8xC196NU/NP microcontrollers	Protect existing software investment
Pipelined architecture/reduced execution states	Up to 5 times faster than the 8xC196KC20
6 Mbyte of address space	More memory headroom for high level language compilation
2 Kbytes code/data RAM	High speed code memory, more space to store data
40-bit accumulator	Added signal processing capability
Multiply and accumulate executes in 80 ns using 40-bit hardware accumulator	Useful in signal processing and feedback control system
512 bytes register RAM	Fast data manipulation within register space